Appeals from the United States Patent and Trademark Office,
Patent Trial and Appeal Board in Nos. IPR2015-00325,
Robert Fahrenkrog, Robins Kaplan LLP, Minneapolis, MN, argued
for appellant. Also represented by Bryan Mechell; Danielle
Rosenthal, New York, NY.
W. Krause, Office of the Solicitor, United States Patent and
Trademark Office, Alexandria, VA, argued for intervenor. Also
represented by Farheena Yasmeen Rasheed, Robert J. McManus.
Newman, O'Malley, and Wallach, Circuit Judges.
NEWMAN, CIRCUIT JUDGE.
Technologies ULC ("ATI") appeals three final
decisions of the Patent Trial and Appeal Board
("PTAB" or "Board") on petitions for
Inter Partes Review filed by LG Electronics, Inc.
("LGE"). The Board held all but one of the
challenged claims unpatentable as anticipated or obvious,
invalidating claims 1, 2, and 5-7 of U.S. Patent No. 7, 742,
053 ("the '053 patent"); claims 1-3, 5, 6,
8-11, 13, 15, 17, and 18 of U.S. Patent No. 6, 897, 871
("the '871 patent"); and claims 1 and 2 of U.S.
Patent No. 7, 327, 369 ("the '369 patent").
Claim 20 of the '871 patent was held patentable. The
three patents are called the "Unified Shader
LGE cited references against each of the Unified Shader
Patents, and ATI's response was that the invention in
each of the three patents preceded the primary reference
dates for that patent. In conformity with 37 C.F.R. §
1.131 ("Rule 131"), ATI presented evidence of
conception, reduction to practice, and diligence for each
patent. The PTAB held separate trials, and received testimony
and argument from both sides. The antedating issue was
treated in detail in the '053 opinion, and applied to the
'871 and '369 patents in separate opinions.
three Unified Shader Patents, the PTAB held that conception
was established before the primary reference dates, and that
constructive reduction to practice occurred on the filing
date of each patent. However, the PTAB held that ATI had not
established actual reduction to practice and had not
established diligence to constructive reduction to practice,
for all three patents. The PTAB then invalidated the Unified
Shader Patents based on the cited references.
conclude that the PTAB erred in its application of the law of
diligence, and that on the correct law, diligence was shown,
thereby antedating the relevant references. The PTO's
decisions of unpatentability are reversed.
"shader" as used in this field is a
computer-implemented system that specifies how a
computer-graphics three-dimensional image is generated and
presented on a two-dimensional screen. The prior art
describes that computer-graphics images are drawn on a screen
by filling in a grid of dots called "pixels."
Shapes are represented by a collection of simple polygons
such as triangles or squares, called "primitives,"
formed by the interconnection of pixels. The corner of each
primitive is called a "vertex," with each vertex
defined by the spatial coordinates: x, y, and z.
and texture are applied to the individual pixels that
comprise the shape, based on the location of the pixels
within the primitive and the primitive's orientation
relative to the generated shape. To orient the wireframe
three-dimensional model, matrix transformations applied to
vertices Vx, Vy, and Vz of the primitives generate new
vertices Vx', Vy', and Vz', which are then
translated into pixels. The graphics processor interconnects
the primitives and applies color and texture to the generated
shapes. ATI presented the following illustration of the
graphics of display of a three-dimensional object as a
Wolfe Decl. at ¶¶ 44-45 (J.A. 5200-01);
see '871 patent, col. 1, ll. 11-60.
art processors required separate shaders to specify how and
with what attributes a final image is drawn, in transforming
primitives by adjusting the x, y, and z coordinates of their
vertices. Prior art graphics processors required both a
vertex shader and a pixel shader, because vertex operations
and pixel operations have different processing requirements
and were required to be performed separately and sequentially
by separate shader systems. The Unified Shader Patents
describe novel systems that perform both vertex operations
and pixel operations, thereby providing enhanced efficiency,
reliability, and speed.
is an outline of the Unified Shader Patents, and
representative claims on appeal:
'053 patent, inventors Laurent Lefebvre, Andrew E.
Gruber, and Stephen L. Morein, filed Sept. 29, 2003
'053 patent is the first-filed of the Unified Shader
Patents. It describes a multi-thread (unified) graphics
processing system that processes both vertex and pixel
operations. The system employs a memory device for storing
command threads and an arbiter for providing a command thread
to a command processing engine, based on a priority plan
whereby the command processing engine performs either vertex
or pixel operations based on the command thread from the
arbiter. The specification provides details of the system and
its operation. Claim 5 was deemed representative for the
5. A graphics processing system comprising:
at least one memory device comprising a first portion
operative to store a plurality of pixel command threads and a
second portion operative to store a plurality of vertex
an arbiter, coupled to the at least one memory device,
operable to select a command thread from either of the
plurality of pixel command threads and the plurality of
vertex command threads; and
a plurality of command processing engines, coupled to the
arbiter, each operable to receive and process the command
PTAB cited three primary references against the '053
patent: U.S. Patent No. 7, 363, 472 ("Stuttard")
having an effective filing date of October 9, 2001; U.S.
Patent No. 7, 015, 913 ("Lindholm") having an
effective filing date of June 27, 2003; and U.S. Patent No.
7, 233, 335 ("Moreton") having an effective filing
date of April 21, 2003.
presented evidence of conception before the earliest
reference filing date of October 9, 2001 (Stuttard), and
evidence of continuing activity until the '053
patent's effective filing date of September 29, 2003. The
PTAB held that "ATI has demonstrated by a preponderance
of the evidence that the named inventors of the '053
patent conceived the claimed system no later than August 24,
2001, prior to the U.S. filing dates of Stuttard, Moreton,
and Lindholm." '053 Op. at 16-17. The dates of
conception and constructive reduction to practice are not
disputed on appeal.
the PTAB held that diligence and actual reduction to practice
had not been shown, and on this basis the PTAB held claims 1,
2, and 5-7 of the '053 patent unpatentable on the
following grounds: (1) claims 5-7 as anticipated by the
Moreton reference; (2) claims 1 and 2 as obvious over Moreton
combined with Whittaker (U.S. Patent No. 5, 968, 167); (3)
claims 1, 2, and 5-7 as obvious over Lindholm in view of
Admitted Prior Art; and (4) claims 1, 2, and 5-7 as obvious
over Stuttard in view of Admitted Prior Art.
withdrawn from the appeal, and the PTO Director has
intervened and argues in support of the PTAB's holdings
that diligence and actual reduction to practice were not
established, and thus that the references were not antedated.
'871 and '369 patents, inventors Steven Morein,
Laurent Lefebvre, Andy Gruber, and Andi Skende, filed
November 20, 2003
'871 and the '369 patents have a common specification
and priority filing date of November 20, 2003. Both patents
are directed to a graphics processor employing a unified
shader capable of performing both vertex operations and pixel
operations, and describe and claim specific embodiments.
Figure 4A is a schematic of the overall process, and is
included in '871 and the '369 Patents:
described in the patents, the graphics processor 60 includes
a multiplexer 66 with a first and a second input, whereby
vertex data are provided at a first input, and interpolated
pixel parameter data and attribute data from a rasterization
engine 74 are provided at a second input. The arbiter 64
generates a control signal that is ...